Resume and JobRESUME AND JOB
Samsung Electronics logo

DFT Design Engineer

Samsung Electronics

DFT Design Engineer

Samsung Electronics logo

Samsung Electronics

part-time

Posted: November 6, 2025

Application Deadline: October 14, 2026

Job Description

Position SummaryRole and ResponsibilitiesAbout Samsung Semiconductor India Research (SSIR)With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products. Roles and Responsibilities- Preferably 12 to 20 years of relevant experience with exposure on end-to-end activities on DFT (Concept, implementation to silicon bring up)- Strong fundamentals on Scan Architectures, MBIST Architectures and Custom BIST- Hands-on experience on Implementation, Verification scenario development, testbench coding, Verification at various abstractions (RTL, GLS with UD and SDF)- Hands-on experience on SDC development- Exposure to post-silicon issue debug- Good problem solving skills- Experience in working with cross-functional teams.- Attention to details, quality reviews and resk managementExperience – 12 to 20 Years QualificationsB.Tech/B.E/M.Tech/M.EDisclaimerSamsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.Skills and Qualifications* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.

Salary

Estimated Salary Rangemedium confidence

1,200,000 - 3,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • DFT (Design for Testability) end-to-end activities including concept, implementation, and silicon bring upintermediate
  • Strong fundamentals in Scan Architecturesintermediate
  • Strong fundamentals in MBIST Architecturesintermediate
  • Strong fundamentals in Custom BISTintermediate
  • Hands-on experience in Implementationintermediate
  • Hands-on experience in Verification scenario developmentintermediate
  • Hands-on experience in testbench codingintermediate
  • Hands-on experience in Verification at various abstractions (RTL, GLS with UD and SDF)intermediate
  • Hands-on experience in SDC (Synopsys Design Constraints) developmentintermediate
  • Exposure to post-silicon issue debugintermediate
  • Good problem solving skillsintermediate
  • Experience in working with cross-functional teamsintermediate
  • Attention to detailsintermediate
  • Quality reviewsintermediate
  • Risk managementintermediate

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Samsung Electronics logo

DFT Design Engineer

Samsung Electronics

DFT Design Engineer

Samsung Electronics logo

Samsung Electronics

part-time

Posted: November 6, 2025

Application Deadline: October 14, 2026

Job Description

Position SummaryRole and ResponsibilitiesAbout Samsung Semiconductor India Research (SSIR)With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products. Roles and Responsibilities- Preferably 12 to 20 years of relevant experience with exposure on end-to-end activities on DFT (Concept, implementation to silicon bring up)- Strong fundamentals on Scan Architectures, MBIST Architectures and Custom BIST- Hands-on experience on Implementation, Verification scenario development, testbench coding, Verification at various abstractions (RTL, GLS with UD and SDF)- Hands-on experience on SDC development- Exposure to post-silicon issue debug- Good problem solving skills- Experience in working with cross-functional teams.- Attention to details, quality reviews and resk managementExperience – 12 to 20 Years QualificationsB.Tech/B.E/M.Tech/M.EDisclaimerSamsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.Skills and Qualifications* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.

Salary

Estimated Salary Rangemedium confidence

1,200,000 - 3,000,000 INR / yearly

Source: ai estimated

* This is an estimated range based on market data and may vary based on experience and qualifications.

Skills Required

  • DFT (Design for Testability) end-to-end activities including concept, implementation, and silicon bring upintermediate
  • Strong fundamentals in Scan Architecturesintermediate
  • Strong fundamentals in MBIST Architecturesintermediate
  • Strong fundamentals in Custom BISTintermediate
  • Hands-on experience in Implementationintermediate
  • Hands-on experience in Verification scenario developmentintermediate
  • Hands-on experience in testbench codingintermediate
  • Hands-on experience in Verification at various abstractions (RTL, GLS with UD and SDF)intermediate
  • Hands-on experience in SDC (Synopsys Design Constraints) developmentintermediate
  • Exposure to post-silicon issue debugintermediate
  • Good problem solving skillsintermediate
  • Experience in working with cross-functional teamsintermediate
  • Attention to detailsintermediate
  • Quality reviewsintermediate
  • Risk managementintermediate

Target Your Resume for "DFT Design Engineer" , Samsung Electronics

Get personalized recommendations to optimize your resume specifically for DFT Design Engineer. Takes only 15 seconds!

AI-powered keyword optimization
Skills matching & gap analysis
Experience alignment suggestions

Check Your ATS Score for "DFT Design Engineer" , Samsung Electronics

Find out how well your resume matches this job's requirements. Get comprehensive analysis including ATS compatibility, keyword matching, skill gaps, and personalized recommendations.

ATS compatibility check
Keyword optimization analysis
Skill matching & gap identification
Format & readability score

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