Job Description

Locations

• Austin, Texas, United States

Salary

Skills Required

• Knowledge of Testability techniques and features (Compressed Scan, Built-in-Self-Test, Loop-Back, Boundary Scan)intermediate
• Well versed in JTAG / 1500 / 1687 networksintermediate
• BSDL, ICL and PDL knowledgeintermediate
• Expertise in ATPG, coverage analysis, and zero-delay / SDF-based pattern simulationsintermediate
• Experience with Cadence DFT tools (Modus and Genus) or Mentor DFT tools (Tessent Shell)intermediate
• Good knowledge of Verilog, logic design, circuit design fundamentals as well as timingintermediate
• Working knowledge of TCL, python (or another scripting language like Perl)intermediate
• Experience in implementation of MBIST and knowledge of repair schemes, algorithmsintermediate
• Experience or working knowledge of SERDES, Analog /mixed-signal DFT techniques (like IOBIST, loop-backs etc.)intermediate
• Post Silicon experience in Pattern conversion for Testers, Pattern Bring-up & Debug, Silicon Characterizationintermediate

Required Qualifications

• Knowledge of Testability techniques and features (Compressed Scan, Built-in-Self-Test, Loop-Back, Boundary Scan) covering digital logic domain, embedded memories and PHY/IO’s (experience)
• Well versed in JTAG / 1500 / 1687 networks. (experience)
• BSDL, ICL and PDL knowledge preferable (experience)
• Expertise in ATPG, coverage analysis, and zero-delay / SDF-based pattern simulations. (experience)
• Experience with Cadence DFT tools (Modus and Genus) or Mentor DFT tools (Tessent Shell) preferred (experience)
• Good knowledge of Verilog, logic design, circuit design fundamentals as well as timing (experience)
• Working knowledge of TCL, python (or another scripting language like Perl) (experience)
• Experience in implementation of MBIST and knowledge of repair schemes, algorithms is a plus (experience)
• Experience or working knowledge of SERDES, Analog /mixed-signal DFT techniques (like IOBIST, loop-backs etc.) is a plus (experience)
• Post Silicon experience in Pattern conversion for Testers, Pattern Bring-up & Debug, Silicon Characterization etc. is a plus (experience)
• Degree in Computer Engineering or Electrical Engineering or equivalent experience with evidence of exceptional abilities (experience)

Preferred Qualifications

• BSDL, ICL and PDL knowledge preferable (experience)
• Experience with Cadence DFT tools (Modus and Genus) or Mentor DFT tools (Tessent Shell) preferred (experience)
• Experience in implementation of MBIST and knowledge of repair schemes, algorithms is a plus (experience)
• Experience or working knowledge of SERDES, Analog /mixed-signal DFT techniques (like IOBIST, loop-backs etc.) is a plus (experience)
• Post Silicon experience in Pattern conversion for Testers, Pattern Bring-up & Debug, Silicon Characterization etc. is a plus (experience)

Responsibilities

• Define and implement various DFT features at RTL and gates using in-house flows
• Work closely with the physical design team in achieving design closure with DFT features
• Perform block-level scan insertion, ATPG, coverage analysis, and simulations
• Run top-level test pattern retargeting and simulations
• Identify design changes needed for improving test coverage
• Work with test / product engineering team members on test pattern delivery and Si bring up

Benefits

• general: Aetna PPO and HSA plans > 2 medical plan options with $0 payroll deduction
• general: Family-building, fertility, adoption and surrogacy benefits
• general: Dental (including orthodontic coverage) and vision plans, both have options with a $0 paycheck contribution
• general: Company Paid (Health Savings Account) HSA Contribution when enrolled in the High Deductible Aetna medical plan with HSA
• general: Healthcare and Dependent Care Flexible Spending Accounts (FSA)
• general: 401(k) with employer match, Employee Stock Purchase Plans, and other financial benefits
• general: Company paid Basic Life, AD&D, short-term and long-term disability insurance
• general: Employee Assistance Program
• general: Sick and Vacation time (Flex time for salary positions), and Paid Holidays
• general: Back-up childcare and parenting support resources
• general: Voluntary benefits to include: critical illness, hospital indemnity, accident insurance, theft & legal services, and pet insurance
• general: Weight Loss and Tobacco Cessation Programs
• general: Tesla Babies program
• general: Commuter benefits
• general: Employee discounts and perks program

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