Job Description

Locations

• PALO ALTO, California, United States

Salary

Skills Required

• Knowledge and experience with logic design and synthesis tools and techniquesintermediate
• Proficient in place and route tools and approachesintermediate
• Proficient in timing and electrical analysis in advanced nodes, including high-frequency design closure, IR drop, power, and reliabilityintermediate
• Skilled with CAD tools and scripting languages (Perl or Python)intermediate
• Understand cell and transistor level digital circuit design, memory and clock structures, and design methodologiesintermediate
• Good understanding of RTL, DFT, and microarchitectureintermediate

Required Qualifications

• Engineering degree in a relevant field, or equivalent work experience (experience)
• 10+ years of industry work experience in VLSI/IC design (experience, 10 years)
• Knowledge and experience with logic design and synthesis tools and techniques (experience)
• Proficient in place and route tools and approaches (experience)
• Proficient in timing and electrical analysis in advanced nodes, including high-frequency design closure, IR drop, power, and reliability (experience)
• Skilled with CAD tools and scripting languages (Perl or Python) (experience)
• Understand cell and transistor level digital circuit design, memory and clock structures, and design methodologies (experience)
• Good understanding of RTL, DFT, and microarchitecture (experience)
• Good communication skills and a demonstrated team player and flexible and able to work independently in a fast-paced environment (experience)

Preferred Qualifications

• Experience in any of these areas is a plus: SOC level physical integration and validation, post-silicon characterization (experience)

Responsibilities

• Lead and drive large design blocks and SOCs from early design stage to tape out
• Floorplan and partition designs to meet area, timing, and power requirements
• Construct high-speed blocks, from synthesis, place, and route, out through timing, physical, and electrical closure to meet performance, robustness, reliability, and power targets
• Read RTL, understand block micro-architecture, perform RTL modifications and prove logical equivalence as needed

Benefits

• general: Aetna PPO and HSA plans > 2 medical plan options with $0 payroll deduction
• general: Family-building, fertility, adoption and surrogacy benefits
• general: Dental (including orthodontic coverage) and vision plans, both have options with a $0 paycheck contribution
• general: Company Paid (Health Savings Account) HSA Contribution when enrolled in the High Deductible Aetna medical plan with HSA
• general: Healthcare and Dependent Care Flexible Spending Accounts (FSA)
• general: 401(k) with employer match, Employee Stock Purchase Plans, and other financial benefits
• general: Company paid Basic Life, AD&D, short-term and long-term disability insurance
• general: Employee Assistance Program
• general: Sick and Vacation time (Flex time for salary positions), and Paid Holidays
• general: Back-up childcare and parenting support resources
• general: Voluntary benefits to include: critical illness, hospital indemnity, accident insurance, theft & legal services, and pet insurance
• general: Weight Loss and Tobacco Cessation Programs
• general: Tesla Babies program
• general: Commuter benefits
• general: Employee discounts and perks program

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